The present patent application relates to methods for producing a thermoelectric layer structure on a substrate with at least one electrically anisotropically conductive V-VI layer, in particular a (Bi, Sb)2 (Te, Se)3 layer and to components incorporating such a thermoelectric layer structure.
Published, Non-Prosecuted German Patent Application DE 198 45 104 A1 discloses a method for producing thermoelectric converters (e.g. Peltier coolers). The latter are preferably produced on standard microelectronics wafers, such as e.g. Si/SiO2. This prior art does not reveal how growth of thermoelectric materials, in particular of anisotropic V-VI materials such as Bi2Te3 can be achieved such that the known anisotropy can be used in a targeted manner for the construction of components.
It is known from thermoelectric components containing Bi2Te3, the most important material therefore, that Bi2Te3 is processed exclusively in a crystallographically favorably oriented manner. It is furthermore known from the publications presented below that material applied by thin-film techniquesxe2x80x94sputtering, molecular beam coating methods, CVD, PVD, etc.xe2x80x94preferably grows with the c-axis perpendicular to the substrate surface. See the references by:
a) Zou, H. et al., titled xe2x80x9cPreparation And Characterization Of p-Type Sb2Te3 And n-Type Bi2Te3 Thin Films Grown by Coevaporationxe2x80x9d, J. Vac. Sci. Technol. A (2001), Vol. 19, No. 3, pp. 899-903;
b) Boikov, Yu. et al., titled xe2x80x9cLayer By Layer Growth Of Bi2Te3 Expitaxial Thermoelectric Heterostructuresxe2x80x9d, Proceedings 16th International Conference on Thermoelectrics, Dresden, Germany, Aug. 1997, pp. 89-92;
c) Nurnus, J. et al., titled xe2x80x9cEpitaxial Bismuth Telluride Layers Grown On (111) Barium Fluoride Substrates Suitable For MQW-Growthxe2x80x9d, Proceedings 18th International Conference on Thermoelectrics (ICT), Baltimore, USA, (1999), pp. 696-699; and
d) Venkatasubramanian, R. et al., titled xe2x80x9cThin-film Thermoelectric Devices With High Room-Temperature Figures Of Meritxe2x80x9d, Nature, Vol. 43, 11. October 2001, pp. 597-602.
This is unfavorable if, for the construction of thermoelectric components, the intention is to use structures and technologies such as in the above-mentioned Published, Non-Prosecuted German Patent Application DE 198 45 104 A1 and such as in the publication by Bxc3x6ttner, H. et al., titled xe2x80x9cNew Thermoelectric Components In Micro-System-Technologiesxe2x80x9d, Proceedings 6th Workshop European Thermoelectric Society (ETS), Freiburg, (2001).
What is disadvantageous in the case of the known solutions is that thermoelectric components currently cannot be grown in an uniquely oriented manner (e.g. with the c-axis parallel to the substrate surface) on customary substrates using thin-film methods. It is an aim of the invention to uniquely set the known anisotropy of the V-VI materials in an advantageous manner for the construction of components.
It is accordingly an object of the invention to provide methods for producing a thermoelectric layer structure and components with a thermoelectric layer structure that overcome the above-mentioned disadvantages of the prior art methods and devices of this general type.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for producing a thermoelectric layer structure. The method includes the steps of providing a substrate, and forming at least one electrically anisotropically conductive V-VI layer on the substrate using the aid of a seed layer or a structure formed in the substrate. The V-VI layer is formed relative to the substrate with an angle between a direction of highest conductivity of the V-VI layer and the substrate being greater than 0xc2x0.
Through the use of a seed layer or by use of a structure applied on the substrate, the growth of the V-VI layer is controlled such that the angle between the direction of the highest conductivity of the V-VI layer and the substrate is greater than 0xc2x0. Consequently, the direction of the highest conductivity of the V-VI layer is not parallel to the substrate, which is advantageous for the use of a thermoelectric layer structure in components. In principle, however, a different orientation may also be advantageous, the invention enabling the targeted orientation.
In an advantageous refinement of the method, the angle between the direction of the highest conductivity of the V-VI layer and the substrate is between 30xc2x0 and 90xc2x0, in particular between 85xc2x0 and 90xc2x0.
It is also advantageous if the seed layer is formed in a textured manner. In this case, textured is understood to mean that one axis of a crystal forming the layer is disposed fixed with respect to a reference axis or area, but the other axes of the crystal can be oriented arbitrarily, in particular can also be rotated. This can be affected in a simple manner if the seed layer is deposited electrochemically and is disposed below or above the V-VI layer.
It is advantageous if at least one seed layer has a thickness of less than 500 nm, in particular of less than 100 nm. The thin configuration of the seed layer ensures a regular crystal growth.
Advantageously, at least one seed layer is disposed in at least two spatially separate regions on the substrate. This enables particularly selective etching.
In a further advantageous embodiment of the method according to the invention, a vertically structured pattern is applied on the surface of the substrate, and the V-VI layer can grow on the pattern such that the growth is directed in a targeted manner.
In this case, it is particularly advantageous if, before the vertically structured pattern is applied to the substrate, the substrate is pivoted by an angle with respect to the vertical. Advantageously, the substrate is pivoted by an angle such that the main deposition direction for the V-VI layer is perpendicular to a starting growth area of the structured pattern. As a result, it is possible to vary the angle between the direction of the highest conductivity and the substrate plane.
In an advantageous manner, in this case the (100) surface of a silicon wafer as the substrate is etched anisotropically in order to obtain oblique areas as a structured pattern.
It is also advantageous if, after the application of the oblique areas, an insulating layer, in particular a thermal oxide, is deposited.
In a further advantageous refinement of the method according to the invention, at least one V-VI layer is disposed on the substrate, the top seed layer is then disposed thereabove and a heat treatment is subsequently effected, so that the V-VI layer is oriented in such a way as to produce, proceeding from the top seed layer, an orientation of the previously random layer in the direction of the lowest or in the direction of the highest conductivity essentially perpendicular to the substrate.
In this case, the orientation of the at least one V-VI layer relative to the substrate, by application of an electric field, is effected such that the angle between the direction of the highest conductivity of the V-VI layer and the substrate is greater than 0xc2x0, in particular essentially 90xc2x0.
In this case, for the crystallographic orientation of thermoelectric layers during growth in thin-film processes, preferably during sputtering, an additional electric field is applied to the substrate electrode during the sputtering operation. This results in preferred growth orientation in the direction of maximum electrical conductivity. This is important e.g. in the case of (Bi,Sb)2(Te,Se)3 or V-VI-materials owing to its anisotropic thermoelectric properties. The growth orientation in the direction of the preferred a-axis becomes important as a result of the additional electric field.
In an advantageous manner, the orientation of the direction of the highest conductivity is supported by application of an electric field.
A component, in particular a Peltier cooler, a thermogenerator or a thermopile (converter of thermal radiation into electrical voltage), has a thermoelectric layer structure produced by one of the methods according to the invention.
A component having the at least one V-VI layer disposed such that the angle between the direction of the highest conductivity of the V-VI layer and the substrate is greater than 0xc2x0, in particular essentially 90xc2x0.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in methods for producing a thermoelectric layer structure and components with a thermoelectric layer structure, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.